1. Field of the Invention
This invention relates to a method and apparatus for use in determining a planarization endpoint during a chemical-mechanical polishing process of a semiconductor wafer.
2. Discussion of the Related Art
In VLSI wiring technology, connecting metal lines are formed over a substrate containing device circuitry. These metal lines serve to electrically interconnect the discrete devices. These metal connecting lines are further insulated from the next interconnection level by thin films of insulating material formed by, for example, chemical vapor deposition (CVD) of oxide. In order to interconnect metal lines of different interconnection levels, holes are formed in the insulating layers to provide electrical access therebetween. In such wiring processes, it is desirable that the layers have a smooth surface topography, because rough surfaces cause fabrication problems. More specifically, it is difficult to image and pattern layers applied to rough surfaces, and this difficulty increases as the number of layers increases.
Presently, there are various types of lapping machines for reducing the thickness of semiconductor wafers. In general, these lapping machines include top and bottom lapping plates, between which the wafers are positioned. The two lapping plates are then moved relative to each other, and a slurry, consisting of an abrasive solution with or without an etching reagent, is fed between the plates to grind and flush away ground wafer particles. While lapping is typically associated with bulk removal of material from a wafer surface, chemical-mechanical polishing (CMP) refers to polishing of thin films rather than bare wafers. In chemical-mechanical polishing, the slurry is fed between the lapping or polishing plates to remove and flush away unwanted film material. A chemical-mechanical polishing machine can include a single rotating polishing plate and a smaller diameter rotating wafer carrier (or carriers) to which a wafer (or wafers) is (are) mounted. The wafer carrier is held above the polishing plate, either in a stationary fixed position or oscillating back and forth in a predetermined path, while both polishing plate and wafer carrier are rotated about their respective center axes. A slurry, as described above, is fed onto the polishing plate during polishing of the wafer. In these processes, it is important to remove a sufficient amount of material to provide a smooth surface, without removing an excessive amount of underlying materials. Thus, a precise etch endpoint detection technique is needed.
Additionally, as metal and insulator polishing processes are becoming increasingly important in the fabrication of multilayer metal/insulator thin film structures, it is critically important to stop the polishing process upon the disappearance, i.e., removal, of the last unwanted monolayers of metal or insulator. In the fabrication of fine-line multilayer structures, i.e., structures having line features on the order of 1 .mu.m or less, very high polishing selectivities, i.e., metal/insulator polishing rate ratios, are needed, however, such high polishing selectivities are not easily obtainable. As a consequence, endpoint detection is necessary and highly desirable to indicate when, for example, the last monolayers of the unwanted metal between the trenches has been removed. Excessive polishing may lead to the excessive thinning of metal lines within trenches, leading to creation of "wires" which are too thin for carrying a required current. On the other hand, insufficient polishing of a metal layer will produce electrical shorts between "wires" which should be isolated electrically. Accurate determination of the polishing process endpoint is thus critical for improved process quality and throughput.
FIG. 1 shows an example of the formation of interlevel metal contact vias 10 (FIG. 2) between a first level metalization 12 and a second level metalization (not shown) in a high performance VLSI circuit 14. Metal contact vias 10 may also represent interconnection wires for a particular metalization level. Following via formation (or wire pattern formation) in interlevel dielectric layer 16 by reactive ion etching, a metalization layer 18 is blanket deposited (FIG. 1). The metalization layer 18 is then polished back to produce planar metal studs 10 (or wires) shown in FIG. 2. A planarization of metalization layer 18 can be achieved upon polishing back using CMP. A persistent difficulty in this process is the inability to precisely determine when the endpoint has been reached during the planarization of the metalization layer 18.
One method and apparatus for CMP endpoint determination is shown in U.S. Pat. No. 5,081,796, issued Jan. 21, 1992 and assigned to Micron Technology, Incorporated. In the '796 patent, endpoint determination is based on an off-table interferometric measurement through a water jet, while the wafer is positioned to overhang the edge of the polishing table. A disadvantage of the '796 apparatus is that the monitored part of the wafer must be off the table during the time of the measurement, which requires a deviation from the wafer's normal trajectory. This deviation increases the likelihood of polishing non-uniformities. Another disadvantage is that the wafer area probed is likely to be much smaller than the area of the wafer that is moved off the table for the measurement, especially for probe sites at the wafer's center. This unduly lowers the duty cycle of the polisher, thereby reducing effective polishing rates and resulting in increased process costs. The '796 apparatus suffers from a dependence upon carrier and table speeds, and in addition, does not lend itself easily to continuous process monitoring, i.e., spatially selective measurements, such as, center to edge polishing variations.
In addition to the above-noted characteristics of CMP, removal uniformity can change during polishing of a wafer as a result of changes in pad and wafer carrier conditions. Detection of abnormal removal uniformity or spurious changes therein is therefore highly desirable, i.e., a method and apparatus for in-situ detection and monitoring of removal non-uniformity.
Thus, there remains a continuing need in the semiconductor fabrication art for an apparatus and method which accurately and efficiently detects and monitors polishing characteristics of a chemical-mechanical planarization process. An in-situ real-time method and apparatus is highly desired.